The pSeries 650 incorporates the latest advancement in leadership chip technology from IBM, the POWER4+ microprocessor, a design enhancement of the POWER4 chip. These copper/silicon-on-insulator (SOI) chips are among the fastest 64-bit processors in the world1.

POWER4 technology represents an enhanced "SMP-on-a-chip" design for UNIX servers. Two processors with 1.5MB of shared Level 2 (L2) cache are incorporated on each chip and mounted on a processor card. Also on the card is shared Level 3 (L3) cache. The L3 cache helps stage information more efficiently from system memory to application programs and provides an up to 15.4GB/second L3 to processor card bandwidth (61.9GB/second for an eight-way system).

The processor card is packaged with the system memory in a rugged unit that protects the components in a rigid structure for greater reliability. This design greatly simplifies upgrades. Plugging in additional two-way processor cards with their L3 cache and memory creates an up to 8-way system. Up to 16GB of memory is available with a two-way system. This maximum memory increases by 16GB for each additional two-way processor.

The rest of the system is designed to match the incredible speed of the POWER4+ processors. The pSeries 650 features a peak aggregate memory to L3 cache bandwidth of 25.6GB/second for an 8way configuration. In addition, aggregate I/O bandwidth is up to 16GB/second. The result is a remarkable combination of system architecture, speed and power that delivers efficient and cost-effective data sharing and application throughput.

The pSeries 650 system can be divided into up to 8 independent logical servers or partitions, each with its own memory, processors, I/O and copy of the AIX 5L™ or Linux® operating system. By enabling consolidation of applications using both operating system onto a single platform, the pSeries 650 can increase system utilization, provide greater flexibility of managing the dynamics of multiple workloads in a single server, reduce complexity and deliver significant administration savings.